View MB39C313EVB-01_4629746.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

FUJITSU MICROELECTRONICS DATA SHEET
DS04-27267-1E
ASSP for Power Management Applications of LCD Panel 4ch System Power Management IC for LCD Panel
MB39C313
DESCRIPTION
The MB39C313 is a 4ch system power management IC. It consists of 2-ch DC/DC Converter and 2-ch Charge pump. The DC/DC converter has excellent line regulation with the feed-forward method. Moreover, SW FET and phase compensator (Buck) is included, so that BOM can be reduced. It is most suitable for large size LCD panel power supply.
FEATURES
* * * * * * * * * * * * * * * * Power supply voltage range: 8 V to 14 V For Buck Converter included SW FET (Vlogic): output 1.8 V to 3.3 V 1.5 A Max For Boost Converter included SW FET (Vs): output 18.1 V Max 1.5 A Max (at 12 V input and 15 V output) Negative Charge Pump with output voltage feedback (VGL): 50 mA Max Positive Charge Pump with output voltage feedback (VGH): 50 mA Max Error Amp threshold voltage: 1.213 V 1.5 % (Vlogic), 1.146 V 0.9 % (Vs),0 V 36 mV (VGL), 1.213 V 2.1 % (VGH) Built-in soft-start circuit independent of loads Excellent line regulation by the feed-forward method (Vlogic, Vs) Built-in phase compensator parts (Vlogic) Built-in sequence comparator for rising Built-in short circuit protection (Vlogic) Built-in over voltage protection (Vs) Built-in over current protection (Vlogic, Vs) Built-in over temperature protection Frequency setting by input pin: 500 kHz / 750 kHz Package: TSSOP-28 Exposed PAD
APPLICATIONS
TFT LCD panels for LCD TV sets and monitors.
Copyright(c)2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved 2009.8
MB39C313
PIN ASSIGNMENT
(TOP VIEW)
FB : 1 COMP : 2 OS : 3 SW : 4 SW : 5 PGND : 6 PGND : 7 SUP : 8 EN2 : 9 DRP : 10 DRN : 11 FREQ : 12 FBN : 13 FBP : 14
(FPT-28P-M20)
28 : SS 27 : GD 26 : DLY2 25 : DLY1 24 : REF 23 : GND 22 : AVIN 21 : VINB 20 : VINB 19 : NC 18 : SWB 17 : BOOT 16 : EN1 15 : FBB
2
DS04-27267-1E
MB39C313
I/O PIN EQUIVALENT CIRCUIT DIAGRAM

Internal Supply (4.0 V)

Internal Supply (4.0 V)
SS FB 1
28
GND

OS (19.8 V max.) GND

GD Internal Supply (4.0 V) 27
GND

Internal Supply (4.0 V) COMP 2
DLY2
26
GND GND

3 OS (19.8 V max.)

Internal Supply (4.0 V)
DLY1
25
PGND
GND
(Continued) 4 DS04-27267-1E
MB39C313
(Continued)
AVIN BOOT 17

DRN
11
GND
PGND

AVIN AVIN
EN1 FREQ 12
16
GND GND

Internal Supply (4.0 V)

Internal Supply (4.0 V)
FBN
13
GND
FBB
15

Internal Supply (4.0 V) GND FBP 14
GND
6
DS04-27267-1E
MB39C313
BLOCK DIAGRAM
A
VB REG 4V <>
BOOT
(SWB + 4 V)
FBB
L priority
15
enb1
Error Amp1
17
VINB
20 21
RON=230 m at VGS=4 V PWM Logic Control DRV
1.213 V
PWM COMP1
A
VTH 1.213 V 1.5%
18
SWB Vlogic (3.3 V/1.5 A Max)
0.9V
OSC_CTL fosc or fosc/2 or fosc/4
LEVEL CONV
Current Limit
ILIM COMP1
0.6V
B
COMP
SCP COMP
VINB
Saw tooth Generator
2
FB SS L priority
B
Error Amp2 VTH 1.146 V 0.9% 1.146 V OVP COMP <> OS
1 28
3
RON=10 at VGS=-12 V 18.7 V
LEVEL CONV
Vs (17.7 V / 1.5 A Max)
enb2
Saw tooth Generator
AVIN
PWM Logic Control
PWM COMP2
SW DRV
4
5
RON=110 m at VGS=5 V
6
GD COMP
7 27
PGND GD
Current Limit ILIM COMP2
1.03 V
C
<> AVIN FBN
13
Error Amp3
Current Control Logic
DRN DRV
11
C
VGL (-5 V / 50 mA Max)
D
VTH 0 V 36 mV
enb3
SUP <> FBP L priority Error
Amp4
8
DRP
14
enb4
Current Control Logic
VTH 1.213 V 2.1%
DRV
10
D
VGH (32 V/50 mA Max)
FREQ
12
OSC
DLY COMP1
L:OTP
DLY1
OTP
L:Protection
25
1.213 V
UVLO enb1 H:Vlogic ON enb2 H:Vs ON enb3 H:VGL ON enb4 H:VGH ON
L : UVLO
DLY2
26
Vlogic ss finish
DLY COMP2
1.213 V AVIN
22 16 9
EN1 EN2
VREF Buffer VIN=12 V
BGR
Power ON/OFF CTL
19
24
NC
REF 1.213 V
23
GND
DS04-27267-1E
7
MB39C313
FUNCTIONAL DESCRIPTIONS
VLOGIC : Buck Converter The Buck converter is a fixed frequency PWM control asynchronous converter with integrated NMOS power switch. It features voltage mode control with input feed forward to improve line regulation performance. The converter is internally compensated and is designed to work with ceramic output capacitor. The main switch of the converter is a 3.2 A rated power NMOS with gate drive circuit reference to SWB pin (source terminal of the NMOS power FET). The gate drive circuit is powered from an internal 4 V regulator and is bootstrapped from SWB pin via an external capacitor to achieve driving capability beyond the supply rail. Soft Start (Buck Converter) The Buck converter has build in soft start control to limit the inrush current at start up. The soft start cycle start after EN1 is asserted and the duration is internally set to 1 ms. During the soft start cycle, the second non-inverting input of the error amplifier, refer to the block diagram, ramps up from 0 V. Thus, the Buck converter output ramps up in a control manner. The soft start cycle ends when the voltage on the second non-inverting input of the error amplifier rises above the reference voltage of 1.213 V. Short Circuit Protection (Buck Converter) The Buck converter is protected from short circuit fault by internal cycle-to-cycle current limit. In addition, the switching frequency is reduced to limit the power dissipation during the fault condition. The switching frequency reduction depends on the voltage on FBB pin. When the voltage of FBB pin is below 0.9 V and 0.6 V, the switching frequency reduces to 1/2 and 1/4 of the normal value respectively. The switching frequency becomes normal automatically if the normal situation was resumed. VS : Boost Converter The Boost converter features fixed frequency pulse width modulated (PWM) control with integrated NMOS power switch. The switching frequency can be set to either 500 kHz or 750 kHz via the FREQ pin. The converter operates as an asynchronous Boost converter with external Schottky diode. The use of voltage mode control with input feed forward improves line regulation performance. In addition, the converter is designed with external frequency compensation that allows flexibility on selecting external component values. A PMOS switch with on resistance of 10 connects between SW and OS pin so that it operates in parallel with the external Schottky diode. At high loading current, most of the inductor current flows through the external Schottky diode. At light load, the PMOS switch provides a conduction path that allows the inductor current flow in reverse direction. As a result, the converter stays in continuous conduction mode for most of the load current range and allows the use of simple frequency compensation scheme. Soft Start (Boost Converter) A build in soft start circuit with an external capacitor connects to SS pin provides soft start function for the Boost converter to prevent high inrush current during start up. The SS pin provides a constant charging current so that soft start time is adjustable by changing the capacitance value of an external capacitor. During start up, the output voltage of the Boost converter is controlled by the SS pin until the voltage on SS pin is higher than the voltage on FB pin and the soft start cycle ends. Over Voltage Protection (Boost Converter) The Boost converter has build in over voltage protection to prevent MB39C313 from being damaged due to excessive voltage stress under fault conditions such as FB pin is left floating or short to ground. The protection circuitry monitors the Boost converter output via OS pin and shut down the NMOS power FET that connects to SW pin when the voltage on OS pin is higher than 18.7 V. As a result, the inductor current start to fall and the output of the Boost converter follows. The Boost converter resumes normal operation when the voltage at OS pin falls below the protection threshold. 8 DS04-27267-1E
MB39C313
Power Up Sequencing (EN1, EN2, DLY1, DLY2) EN1 and EN2 pin control the power up sequence of MB39C313. The timing of the sequencing events is controlled by the capacitance on DLY1 and DLY2 pins. By pulling EN1 high, the Buck converter enables first. Then, the Negative Charge Pump is enabled after some delay time, DLY1. Pulling EN2 high, the Boost converter and Positive Charge Pump are enabled at the same time with some time delay, DLY2. If EN2 pin is pulled high when the Buck converter is already operating, the time delay DLY2 starts at the EN2 rising edge, Figure1. Setting such delay time can be particularly useful if EN2 is already connected to input voltage (VIN). If EN2 is pulled high before the Buck converter is operating, the time delay DLY2 starts after the Buck converter is fully on, Figure2. * Figure 1. Power-On sequence with EN2 is always high
EN2
EN1 DLY2 VGH Vs Vin Vin Vlogic 0V VGL
Fall Time of each channel depends on load current and feedback resistors.
DLY1
GD
* Figure 2. Power-On sequence with EN1 and EN2 enabled separately
EN2
EN1 DLY2 VGH Vs Vin
Fall Time of each channel depends on load current and feedback resistors.
Vin
Vlogic
0V VGL
DLY1
GD
10
DS04-27267-1E
MB39C313
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol VDD Power supply voltage VBOOT VSUP VFB VOS Input voltage VGD VEN VFREQ SW Voltage SW peak current Power dissipation Storage temperature VSWB VSW ISWB ISW PD TSTG Condition AVIN,VINB pin BOOT pin SUP pin FB, FBB, FBN, FBP pin OS pin GD pin EN1,EN2 pin FREQ pin SWB pin SW pin SWB pin AC SW pin AC Ta + 25 C Rating Min - 0.3 - 0.3 - 0.3 - 0.3 - 0.3 - 0.3 - 0.3 - 0.3 - 0.7 - 0.3 - 55 Max + 17 + 19.8 + 19.8 +7 + 19.8 + 19.8 + 17 + 17 + 17 + 19.8 3.9 4.2 3.44* +125 Unit V V V V V V V V V V A A W C
* : When mounted on a 100mm x 100 mm: 4 layer. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
DS04-27267-1E
11
MB39C313
RECOMMENDED OPERATION CONDITIONS
Parameter Power supply voltage REF pin output current Symbol VDD VBOOT VSUP IREF VFB VOS Input voltage VGD VEN VFREQ Output voltage VO VO IO IO ISWB Output current ISW IGD IOS IDRN IDRP SW inductor BOOT pin capacitor REF pin capacitor DRP, DRN pin capacitor SS pin capacitor DLY pin capacitor Vlogic output filter capacitor Vs output filter capacitor Operating ambient temperature LSWB LSW CBOOT CREF CDR CSS CDLY Cout Cout Ta Condition AVIN, VINB pin BOOT pin SUP pin REF pin FB, FBB,FBN, FBP pin OS pin GD pin EN1,EN2 pin FREQ pin Vlogic: Buck Converter Vs: Boost Converter Vlogic: Buck Converter DC Vs: Boost Converter DC VIN = 12 V, Vs = 15 V, L = 10 H SWB pin DC SW pin DC GD pin OS pin DRN pin DRP pin SWB pin SW pin BOOT pin REF pin DRP, DRN pin SS pin DLY1, DLY2 pin Vlogic: Buck Converter Vs: Boost Converter Value Min 8 13 8.0 - 50 0 0 0 0 0 1.8 - 1.5 - 100 - 100 - 100 10 6.8 0.01 0.10 0.10 - 30 Typ 12 17 12.0 10.0 0.10 0.22 0.47 0.022 0.01 20 66 + 25 Max 14 18 18.1 0 5.5 18.1 18.1 14 14 3.3 18.1 1.5 1.5 1.5 1 +100 +100 +100 15 22.0 1.00 1.00 1.00 1.000 1.00 + 85 Unit V V V A V V V V V V V A A A A mA mA mA mA H H F F F F F F F C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. 12 DS04-27267-1E
MB39C313
ELECTRICAL CHARACTERISTICS
(Ta = + 25 C, AVIN = VINB = SUP = 12 V) Parameter Reference Voltage Block [ VREF ] Bias Voltage Block [ VB ] Under Voltage Lockout Protection Circuit Block [ UVLO ] Over Temperature Protection Block [ OTP ] Output voltage Output voltage Threshold voltage Hysteresis width Stop temperature Hysteresis width Symbol Pin No. 24 Condition Value Min 1.203 Typ 1.213 Max 1.223 Unit
VREF
REF = 0 mA BOOT = -1 mA, BOOT pin AVIN =
V
VB
17
3.5
4.0
4.5
V
VTLH VH TOTPH TOTPHYS
22 22
5.6
6.0 0.2* + 150* + 15* 750
6.4 900
V V C C KHz
T junction
600
fOSC Output frequency Oscillator Block [ OSC ] Input voltage Threshold voltage Charging current Input voltage fOSC
4, 5, 10, 11, FREQ = "H" 18 4, 5, 10, 11, FREQ = "L" 18 12 12 fOSC = 750 KHz set fOSC = 500 KHz set
400
500 1.180 5.5 0 0 0 1 0.2 0.2
600 0.4 1.239 7.1 0.8 1 1 1 2 0.5 2.0
KHz
VIH VIL VTH IDLY VIH VIL ICCS
1.7 1.123 3.8 2
V V V A V V A A A mA mA mA
Sequence Control Block [ SEQ CTL ] Control Block [ CTL ]
25, 26 DLY1, DLY2 pin 25, 26 9,16 9,16 22 20, 21 8 22 20, 21 8 DLY1, DLY2 = 0V EN1, EN2 ON EN1, EN2 OFF EN1, EN2 = 0 V, AVIN pin EN1, EN2 = 0 V, VINB pin EN1, EN2 = 0 V, SUP pin EN1, EN2 = AVIN, AVIN pin EN1, EN2 = AVIN, VINB pin EN1, EN2 = AVIN, SUP pin
Stand by current
ICCS ICCS
General ICC Power supply current ICC ICC
(Continued)
DS04-27267-1E
13
MB39C313
Parameter Threshold voltage Input bias current SW NMOS-Tr On resistor SW PMOS-Tr On resistor SW NMOS-Tr Leak current SW PMOS-Tr Leak current Over current protect Over voltage protect Soft-start charging current GD Thresh old voltage GD "L" level output voltage GD output leak current Threshold voltage Input bias current On resistor VGL [ Negative Charge Pump ] I/O voltage difference
Symbol VTH IB
Pin No. 1 1
Condition FB pin FB = 0 V SW = 500 mA VGS = 5 V OS = -200 mA VGS = 12 V EN2 = 0 V OS = 15 V SW = 0 V EN2 = 0 V SW = 15 V SW pin OS =
Value Min 1.136 -100 Typ 1.146 0 Max 1.156 +100
Unit V nA
RON
4,5
110*
m
RON
3,4,5
10
16
ILEAK
4,5
10
A
Vs [ Boost Converter ]
ILEAK
3
2.8
3.5
10
A A
ILIM
4,5
4.2
VOVP
3
18.5
18.7
18.9
V
Iss
28
SS = 0 V FB = GD = 500 A GD = 17 V
10
15
20
A V
VTH
1
1.01 -36
1.03 0 0 4.4 130
1.05
VOL
27
0.3
V A mV nA mV
ILEAK VTH IB RON Vdrop
27 13 13 11 11
1 +36 +100 6.6 190
FBP = 0 V IDRVN = -20 mA DRN = 50 mA FBP = nominal-5% DRN = 100 mA FBP = nominal-5%
-100
Vdrop
11
270
420
mV
(Continued)
DS04-27267-1E
15
MB39C313
(Continued) Parameter Threshold voltage Input bias current On resistor VGH [ Positive Charge Pump ] I/O voltage difference Vdrop 10 Symbol VTH IB RON Pin No. 14 14 10 FBP = 0 V Iout = 20 mA Vdrop = SUP-DRP DRP = -50 mA FBP = nominal-5% Vdrop = SUP-DRP DRP = -100 mA FBP = nominal-5% Condition Value Min 1.187 -100 Typ 1.213 0 1.10 Max 1.238 +100 1.65 Unit V nA
Vdrop
10
400
680
mV
850
1600
mV
* : This parameter isn't be specified. This should be used as a reference to support designing the circuit
16
DS04-27267-1E
MB39C313
(Continued)
Power dissipation vs. Operating ambient temperature
4000 Power dissipation PD (mW) 3500 3440 3000 2500 2000 1500 1000 500 0 -40 -20 0 +20 +40 +60 +80 +100
Operating ambient temperature Ta (C)
18
DS04-27267-1E
MB39C313
SET UP
1. Setting Control Pin
Pin EN1 EN2 Channels VLOGIC: Buck converter VGL: Negative Charge Pump VS: Boost converter VGH: Positive Charge Pump Standby L L Operating H H
2. Setting Switching Frequency
Pin FREQ Setting H L Internal oscillator frequency 750 kHz 500 kHz
3. Protection Circuitry
3.1) IC Under voltage lock out: AVIN 6 V, all channels shut down 3.2) VLOGIC : Buck Converter Short circuit protection: FBB pin < 0.9 V, protection circuit active Over current protection: output current 3.2 A, protection circuit active 3.3) VS : Boost Converter Over voltage protection: VS 18.7 V, protection circuit active Over current protection: SW pin current 3.5 A, protection circuit active 3.3) VGL : Negative Charge Pump No protection circuits 3.4) VGH : Positive Charge Pump No protection circuits
DS04-27267-1E
19
MB39C313
4. Others
4.1) DLY1 / DLY2 delay time setting With time delay (tdelay): DLY1 / DLY2 = open Without time delay (tdelay): for each DLY1 / DLY2, 5.5 A x tdelay Cdelay = VREF Where: tdelay = delay time, Cdelay = Capacitor value connected to DLY-pin, VREF = 1.213 V 4.2) VLOGIC : Buck converter Output voltage setting : R1 VO1 = VREF x 1 + R2
(
)
Where: VREF = 1.213 V, R2 1.2 k Feed-forward capacitance : 1 Cff1 = 2 x x R1 x fz1 Where : fz1 = a zero in transfer function Soft start: Internal preset The soft start cycle start after EN1 is asserted and the duration is internally set to 1 ms. 4.3) VS: Boost converter Output voltage setting: VO2 = 1.146 x
(
1+
R3 R4
)
Feed-forward capacitance: 1 Cff2 = 2 x x R3 x fz2 Where : fz2 = a zero in transfer function Soft start: set by external capacitor connected to SS pin (Soft start active when SS pin voltage < FB voltage) GD pin: GD goes L if FB > 1.03 V after delay time DLY2 GD gives Hi-Z if FB 1.03 V after delay time DLY2 20 DS04-27267-1E
MB39C313
4.4) VGL : Negative Charge Pump Output voltage setting: R5 , where VREF = 1.213 V VO3 = (-VREF) x R6
4.5) VGH : Positive Charge Pump Output voltage setting: R7 VO4 = VREF x 1 + R8
(
)
, where VREF = 1.213 V
Note : refer to " APPLICATION MANUAL" for corresponding resistor.
DS04-27267-1E
21
MB39C313
APPLCATION MANUAL
1. Buck Converter Design
(1) Buck Converter Block Diagram
A
R1 R2 Cff1 VB REG <>
BOOT (SWB + 4 V)
17
VINB
15
FBB enb1
L priority
S + +
Error Amp1
20 21
RON = (230 m at VGS = 4 V) PWM Logic Control DRV
CBOOT
1.213 V
+ S
PWM COMP1
A
VTH 1.213 V 1.5%
+ S
18
+
SWB Vlogic (3.3 V/1.5 Amax)
0.9 V
+ S
OSC_CTL fOSC or fOSC/2 or fOSC/4
LEVEL CONV
Current Limit
S
ILIM COMP
0.6 V SCP COMP
OSC VINB
Saw tooth Generator
(2) Inductor Selection The inductor can range from 10 H to 15 H. The current flow through the inductor must below the saturation current rating of the inductor. The maximum current flowing through the inductor can be found from the following formula: IL ILMAX IOMAX 2 Vin x Vout L VOUT Vin x fOSC
IL =
x
Where ILMAX = Maximum current through inductor [A] IOMAX = Maximum load current [A] IL = Inductor ripple current peak-to-peak value [A] Vin = Input voltage [V] Vout = Output voltage [V] fOSC = switching frequency [Hz] (500 kHz or 750 kHz) Inductor current
ILMAX IOMAX
IL
0
t
22
DS04-27267-1E
MB39C313
(3) Rectifier Diode Selection Schottky diode should be used to attain high efficiency. The reverse voltage rating of the diode must be higher then the maximum output voltage of the converter. The required averaged rectified forward current of diode is the product of off-time of Buck converter and the maximum switch current at SWB pin. Vout Vin
Off-time of Buck converter: D = 1 -
=1-D
Maximum output current: Iavg = (1 - D) x ISWLIM =
(
1-
Vin Vout
)
x ISWLIM
A Schottky diode with maximum rectified forward-current of 1.5 A to 2 A should be sufficient for most of applications. The diode forward voltage should be less than 0.7 V in order to prevent damage to IC. Another requirement for Schottky diode is the power dissipation. The power dissipation can be calculated from the formula below: PD = Iavg x VF = (1 - D) x ISWLIM x VF Where PD = Power dissipation of the diode [W] VF = Diode forward voltage [V] ISWLIM = Minimum over current protection of SWB-pin [A] (2.5 A) (4) Bootstrap Capacitor Selection Bootstrap capacitor connected to BOOT pin is charged by integrated synchronous diode with 4 V internal supply. Ceramic capacitor is recommended for less leakage current. The minimum bootstrap capacitor can be calculated by following equation: IDRV (dynamic) ICBOOT (leak) QGATE + + QDRV (static) f f CBOOT VB - Vf - VLS - Vmin Where: CBOOT = bootstrap capacitor value QGATE = gate charge of integrated power transistor f = switching frequency (500 kHz or 750 kHz) IDRV(dynamic) = dynamic current of power transistor driver QDRV(static) = static current of power transistor driver ICBOOT(leak) = bootstrap capacitor leakage current VB = internal regulated voltage 4 V Vf = forward voltage drop of bootstrap diode VLS = voltage drop of low-side diode of Buck converter Vmin = minimum voltage between BOOT pin and SWB pin Practically, bootstrap capacitor is selected more than ten times of its minimum value, such that providing sufficient charge for driver and gate of power transistor. With assumption on power used is dominated by charging the gate capacitor of power transistor, the equation can be simplified: QGATE CBOOT , where V is the change of boot voltage in switching cycle. V 0.1 F bootstrap capacitor is recommended for Buck converter in MB39C313. The bootstrap capacitor voltage rating is suggested to be high than input voltage.
DS04-27267-1E
23
MB39C313
(5) Output Capacitor Selection This IC is designed to work best with ceramic output capacitor. Two 10 F ceramic output capacitors are recommended for most application. More capacitance can be added so as to reduce voltage drop during load transients. (6) Output Voltage and Feed Forward Capacitor Selection * Equivalent circuit of Buck converter error amp block
CH1 output
R1 R2
Cff1 15 FBB enb1
L priority S + +
Error Amp1
1.213 V VTH 1.213 V 1.5%
The output voltage of Buck converter can be set by external resistor divider as shown below: R1 R1 = 1.213 x 1 + VLOGIC = VREF x 1 + R2 R2
(
)
(
)
R2 is around 1.2 k, and the reference voltage (VREF) = 1.213 V The lower feedback resistor (R2) should be around 1.2 k to maintain a minimum load current of 1 mA. If the loading current is less than 1 mA, the output voltage will rise slightly above the nominal voltage in light load or no load condition. A feed forward capacitor (Cff1) is added parallel to the upper resistor (R1). The Cff1 sets a zero in the transfer function. This will improve the load transient response and stabilize the converter loop. The value of Cff1 is depending on the inductor and zero frequency (fz1) required. For 10 H inductor, set fz1 = 8 kHz; for 15 H inductor, set fz1 = 17 kHz. 1 1 = = 9.9 nF = 10 nF (Example of 3.3 V output voltage) : Cff = 2 x x 2 k x 8 kHz 2 x x R1 x fZ A capacitor value close to the calculated value is chosen.
24
DS04-27267-1E
MB39C313
2. Boost Converter Design
(1) Boost Converter Block Diagram * Figure 3. Boost converter block diagram
B COMP 2 FB 1 Cff2 SS 28 B L priority
- + +
R3 R4
Error Amp2 VTH 1.146 V 0.9%
OVP COMP
<< CH2(Boost) >>
- +
OS 3 RON = (10 at VGS = -12 V) Vs (17.7 V / 1.5 A Max)
18.7 V
1.146 V
LEVEL CONV SW
VIN
enb2
Saw tooth Generator AVIN
+ -
PWM COMP2
PWM Logic Control
+
DRV
4
5
RON = (110 m at VGS = 5 V) 6 7 27 PGND GD
+
GD 1.03 V COMP
-
OSC
Current - Limit ILIM COMP
It is necessary to verify the maximum output current of this converter whether it meets the application requirements. The efficiency of the Boost converter can be read from the graph or employ a worst-case assumption of 80 %. Vin x Vout Vin Vout Iout 1-D
Duty cycle: D = 1 -
Maximum output current: Iavg = (1 - D) x ISWLIM
x ISWLIM
Peak switch current: ISWPEAK =
Vin x D 2 x fOSC x L
+
Where D = duty cycle fOSC = switching frequency [Hz] (500 kHz or 750 kHz) L = inductor value [H] = estimated Boost converter efficiency (typically 80 % minimum) ISWLIM = minimum switch current limit of SW-pin [A] ( = 2.8 A) The selected components, including the embedded switch, the inductor and external Schottky Diode must be able to handle the peak switching current. The estimation should be based on the minimum input voltage, since the switching current will be the highest in this case. Limited by the power FET maximum switching current, the maximum output current depends on input voltage and output voltage configuration. Refer to "REFERENCE DATA" section for graphical information. For data reading from reference data, margin is suggested to avoid activating current limit. Inductor Selection The inductor can range from 6.8 H to 22 H. When selecting the inductor, its saturation current must be higher than the peak switch current (ISWPEAK) as shown above. Extra margin is required to cope with high current transients. A more conservative design is to use the maximum SW current limit of 3.5 A as saturation current rating of inductor. Another parameter for choosing inductor is the DC resistance. Usually, lower the DC resistance can result in higher converter efficiency. DS04-27267-1E 25
MB39C313
(2) Rectifier Diode Selection Schottky diode should be used to attain high efficiency. The reverse voltage rating of the diode must be higher than the maximum output voltage of the converter. Similar to Buck converter, the required averaged rectified forward current of the Schottky diode is the product of off-time of Boost converter and the maximum switch current at SW pin. Vin Vout Vin Vout
Off-time of Boost converter: D = 1 - D =
Maximum output current: Iavg = (1 - D) x ISWLIM
x ISWLIM
A Schottky diode with maximum rectified forward-current of 2A should be sufficient for most applications. Another requirement for Schottky diode is the power dissipation. The power dissipation can be calculated from the formula below: PD = Iavg x VF = (1 - D) x ISWLIM x VF Where PD = power dissipation of the diode [W] VF = diode forward voltage [V] ISWLIM = minimum over current protection of SW-pin [A] (2.8 A) (3) Output Capacitor Selection Capacitors with low ESR are recommended. Ceramic capacitor which has low ESR is particularly suitable for this purpose. Typically, three 22 F ceramic capacitors connected in parallel are placed at the converter output. More capacitance can be added so as to reduce voltage drop during heavy load transients.
26
DS04-27267-1E
MB39C313
(4) Output Voltage and Feed Forward Capacitor Selection * Equivalent circuit of Boost converter error amp block
CH2 output (step up converter) COMP 2 R3 Cff2 FB 1 SS 28 L priority
- + +
Error Amp2 VTH 1.146 V 0.9%
R4
1.146 V
enb2
The Boost converter output voltage of can be set by external resistor divider as shown below: R3 VS = 1.146 x 1 + R4
(
)
Note : Output overshot due to large input voltage change may be high enough to trigger OVP under certain condition when output setting is close to 18 V. A feed forward capacitor (Cff2) is added parallel to the upper resistor (R3). The Cff2 sets a zero in the control loop transfer function. This improves the load transient response and stabilizes the converter loop. The value of Cff2 is depending on the inductor and zero frequency (fz2) required. For 6.8 H and 10 H inductor, set fz = 10 kHz; for 22 H inductor, set fz = 7 kHz. 1 1 = = 23.4 pF = 20 pF (Example of 16.5 V output voltage) : Cff2 = 2 x x 680 k x 10 kHz 2 x x R3 x fZ2 A capacitor value close to the calculated value can be used. (5) Compensation (COMP) Capacitor Selection The regulator compensation is adjusted by an external component connected to the COMP-pin. This pin is the output of internal trans-conductance error amplifier. By adding a resistor in series will change the internal zero and increases the high-frequency gain. The formula below give the frequency (Fz) at which the resistor increases the high-frequency gain. 1 2 x x CC x (RC + 10 k)
FZ =
Typically, a 22 nF capacitor is suitable for most applications. If the input voltage is lower, it requires a smaller capacitor value so that it has higher regulator gain.
DS04-27267-1E
27
MB39C313
(6) Soft Start Capacitor Selection A soft start function is to slow the rate of rising output voltage and minimize the large inrush current at startup. The soft start time is adjustable by connecting external capacitor to SS pin. Soft start capacitor can be estimated by defining the soft start time thought equation below: Iss x tss , C= VFB Where: Iss = soft start charging current; tss = soft start time; VFB = voltage at FB pin. In general, startup time for power supply is larger than 10 us. The startup time of Boost converter of MB39C313 is defined as 1.5 ms. Iss x tss 15 A x 1.5 ms C= = = 19.6 nF, therefore, 22 nF soft start capacitor is selected. 1.146 V VFB
3. Positive Charge Pump Design
(1) Positive Charge Pump Block Diagram
D SUP << CH4(Positive Charge Pump) >> R7 FBP 14
S
Vs (17.7 V) 8 DRP DRV 10
L priority
+ +
Error Amp4 Current Control Logic OSC VGH (32 V / 50 mA Max) D
R8
enb4
VTH 1.213 V 2.1%
(2) Output Voltage Selection Theoretically, the maximum output voltage is the sum of input voltage and pumping clock voltage of a charge pump. In MB39C313, the maximum output voltage is VS (Boost converter output voltage) + VSUP - 2Vdiode which is 17.7 V + 17.7 V + 2(0.4 V) = 34.6 V with typical setting. Due to the regulated voltage control, the output voltage can be configured by equation below: R7 R7 = 1.213 x 1 + VGH = VREF x 1 + R8 R8
(
)
(
)
Typically, multiple 2 (x2) function for Positive Charge Pump. Its output voltage will be limited by VS - 2Vdiode VGH Vs + VSUP - 2 Vdiode. For other application that requires higher output voltage, MB39C313 allows adding pumping stage by using SW pin. With multiple 3 (x3) function of Positive Charge Pump, the output voltage should be limited by 2VS + Vdiode(Vs) - 2Vdiode VGH 2VS + Vdiode(Vs) + VSUP - 4Vdiode.
28
DS04-27267-1E
MB39C313
(3) Pumping Capacitor and Output Capacitor Selection Ceramic capacitor is recommended for its non-polarized, more stable over temperature, low leakage and small ESR. Choosing a pumping capacitor should consider the required voltage rating and output current loading. For 32 V output voltage setting, the pumping clock voltage is calculated below. VDRP = VGH - VS + 2(Vdiode) = 32 V - 17.7 V + 2(0.4 V) = 15.1 V The minimum pumping capacitor is determined by following equation. Iout C , f x VDRP Where: Iout = the output current f = switching frequency (500 kHz or 750 kHz) VDRP = pumping clock voltage The charge stored on pumping capacitor is transferred to output capacitor cycle-by-cycle. Output capacitor determines output ripple voltage of charge pump. The ripple voltage is estimated by: Iout Vripple = + Iout x ESRCout 2f x Cout Where: Cout = output filtering capacitance ESRCout = equivalent series resistance of output filtering capacitor
4. Negative Charge Pump Design
(1) Negative Charge Pump Block Diagram
C
<< CH3(Negative Charge Pump) >> AVIN R5 R6 FBN 13 Error Amp3
- +
Current Control Logic OSC
DRN DRV 11
C VGL (-5 V/50 mA)
REF (1.213 V)
VTH 0 V 36 mV
enb3
(2) Output Voltage Selection Recall from functional description, the maximum negative output voltage is - VDRN + Vdiode ideally, which is -12 V + 0.4 V = -11.6 V. Similar to Positive Charge Pump, the regulated output voltage can be set by equation below: R5 R5 VGL = -VREF x = -1.213 x R6 R6
DS04-27267-1E
29
MB39C313
(3) Pumping Capacitor and Output Capacitor Selection Selection of pumping capacitor and output capacitor are similar to Positive Charge Pump design. For -5 V output, VDRN = -VGL - Vdiode = -5 V - 0.4 V = -5.4 V. The pumping capacitor and output filtering capacitor can be estimated for required application. Fast input voltage change at power off causes under-shoot (becomes more negative) at Negative Charge Pump output. This under shoot can be reduced by increasing the output capacitance to pumping capacitance ratio. The power off coupling voltage is VIN - | VDRN |. The coupling effect can be estimated as below: Cpump-cap Vunder-shot = (VIN - | VDRN |) = x Cpump-cap + Coutpu-cap Where: Vunder - shot = under-shot voltage by power off coupling. VDRN = pumping clock voltage Cpump-cap = pumping capacitance Coutput-cap = output capacitance In real application, the power off coupling should be negligible due to large loading gate capacitance on panel. (4) REF Capacitor Selection REF pin capacitor is used for defining the low frequency gain of reference voltage buffer. 220 nF capacitor is used for stability and performance. Change of capacitance is NOT recommended. (5) DLY Capacitor Selection Refer to "Power Up Sequence" section, power up sequence timing is set by capacitor at DLY1 and DLY2 pins. The delay capacitor can be estimated by following equation. Cdelay = 5.5 A x tdelay VREF
Where: tdelay = delay time Cdelay = capacitor connected to DLY-pin VREF = 1.213 V (6) Input capacitor Selection It is recommended to use low ESR capacitor like ceramic capacitor for the input filtering. For AVIN terminal, a 1 F capacitance connected from AVIN to ground is needed. For the Buck converter, use minimum of two 22 F ceramic capacitors connected from VINB pin to ground. For the Boost converter, minimum of one 22 F ceramic capacitor connected from the inductor terminal to ground is recommended.
5. System Design Consideration
(1) Output Glitches when Very Slow Power up Time A very slow power up time may cause channel output glitches when input voltage across UVLO voltage. Due to slow rise of input voltage at UVLO threshold, the UVLO is easily triggered with switching noise. This undesired UVLO activation will cause glitches at output when channel is loaded. The main reason is due to the input voltage drop by sudden current draw when channel startup. For maximum output loading, 0.1 equivalent series resistance of power line is able to cause 0.3 V voltage drop. Consider UVLO hysteresis voltage and its response time with margin. For typical setting (VIN = 12 V, VLogic = 3.3 V/ 1.5 A and other channels without load, 0.1 source resistance), it is suggested less than 167 ms input voltage ramp time to avoid such glitches. Refer to " TYPICAL APPLICATION CIRCUIT" for typical application setting.
30
DS04-27267-1E
MB39C313
(2) Voltage Overshot at Boost Converter Output during Power Up A voltage overshot appears at Boost Converter output when input voltage rise time is too fast. This overshot voltage may damage external parts. * Figure 4. Simplified Boost Converter of MB39C313.
VIN Vs
MB39C313
N-DRV P-DRV
Refer to Figure 4, consider the node voltage at power up, both gate voltage of P-type and N-type power FET are zero. With sudden voltage change at input, current flow through inductor and charge up the output capacitor towards input voltage. The P-type power FET will be turned off when output capacitor rise to certain voltage. The charging current continues to flow through the Schottky diode, such that capacitor reaches its peak voltage. As the diode blocks the reverse current, the output capacitor voltage can only be discharged by loading elements. To avoid this overshot voltage at power up, the rise time of input voltage should be controlled base on RLC resonance frequency of application circuit. No load condition can be used to estimate worst case. 1 The LC resonance frequency is 2 LC For typical application, L = 6.8 H, C = 66 F, the theoretical input rise time should be longer than 133 s. Margin is suggested for other parasites. (3) GD FET Isolation An isolation switch for Boost Converter output is suggested to break current path for application in disable condition. The isolation switch can be controlled by GD pin. Refer to Figure 3 for its application connection.
DS04-27267-1E
31
MB39C313
(4) PCB Layout Recommendation PCB layout is significant for power supply design. Poor layout would result in generating unwanted voltage and current spikes. This will not only affect DC output voltage, but also radiate EMI to adjacent equipment. Sufficient grounding and minimize parasitic inductance can reduce DC/DC converter switching spike noise. The following list of rules should be followed when designing power PCB layout 1. Place tracks on the Top Layer and avoid using via or through hole; particularly for nets, such as Input Capacitor (Cin), Inductor (L) and Output Capacitor (Cout). 2. Place the Input Capacitor (Cin) close to the IC, so as to reduce loop current. 3. Place the Schottky diodes close to the SW and SWB respectively, so as to reduce spike noise. 4. Strengthen the ground connection of Input Capacitor (Cin), and Output Capacitor (Cout) with the ground planes. This can be done by placing via holes next to the GND terminals of these components. 5. Place the Schottky Diode and Pumping Capacitor of the two charge pump channels close to IC. 6. The Decoupling Capacitor should be placed near to IC pin of VINB and AVIN. Separate track is required for AVIN and VINB. The GND terminal of AVIN should be placed close to the GND terminal of IC. (Via holes should be placed near to the GND terminals of IC and Capacitors. The connections to internal ground plane should be strengthened at these points.) 7. Feedback paths (i.e. FBB, FB, FBN, FBP) are very sensitive to noise, thus the track should be as short as possible at these terminals. The Output (Vo) feedback line should be placed away from switching components and tracks. Particularly DRN and FBN of the negative charge pump. Use the FREQ pin to separate these two tracks. Similarly, the FBB and SWB can be separated by the EN1 track. Because EN1, EN2 and FREQ are less susceptible to noise. 8. Place wide and short track to connect Boost Converter Output and OS pin. 9. The two ground planes GND and PGND are intersect at the IC thermal pad only.
32
DS04-27267-1E
MB39C313
EXAMPLE OF STANDARD OPERATION CHARACTERISTICS
REFERENCE DATA (1) Buck Converter Characteristic Efficiency vs. Output Current VIN = 12 V, VLOGIC = 3.3 V, L1 = 10 H
100 90 80 Efficiency (%) 70 60 50 40 30 20 10 0 0 0.5 1 Load Current Io (A) 1.5
2 1
Soft Start VIN = 12 V, VLOGIC = 3.3 V , ILOAD = 1.2 A
VO1 1 V/div
ILx1 1 A/div
Time base : 200 s/div
PWM Operation Continuous Mode VIN = 12 V, VLOGIC = 3.3 V, ILOAD = 1.5 A
PWM Operation Discontinuous Mode VIN = 12 V, VLOGIC = 3.3 V, ILOAD = 45 mA
SWB 5 V/div
SWB 5 V/div
2
2
VO1 20 mV/div
1 1
VO1 20 mV/div ILx1 100 mA/div
4
ILx1 1 A/div
3
Time base : 500 ns/div
Time base : 500 ns/div
Output Voltage vs. Output Current
Output Voltage Vo (V) 3.327 3.317 3.307 3.297 3.287 3.277 3.267 0 VIN = 8 V VIN = 10 V VIN = 12 V VIN = 14 V 0.5 1 Load Current Io (A) 1.5
DS04-27267-1E
33
MB39C313
(2) Boost Converter Characteristic Efficiency vs. Output Current VIN = 12 V, VS = 17.7 V, L2 = 6.8 H
100 90 80 Efficiency (%) 70 60 50 40 30 20 10 0 0 0.5 1 Load Current Io (A) 1.5
2 1
Soft Start VIN = 12 V, VS = 17.7 V, ILOAD = 1.2 A, CSS = 22 nF
VO2 5 V/div
ILx2 1 A/div
Time base : 2 ms/div
PWM Operation Continuous Mode VIN = 12 V, VS = 17.7 V, ILOAD = 1.5 A
SW 10 V/div
PWM Operation Discontinuous Mode VIN = 12 V, VS = 17.7 V, ILOAD = 10 mA
SW 10 V/div
2 1
2 1
VO2 50 mV/div VO2 50 mV/div
3
ILx2 500 mA/div
ILx2 1 A/div Time base : 1 s/div
3
Time base : 1 s/div
Output Voltage vs. Output Current
17.873 17.823 Output Voltage Vo (V) 17.773 17.723 17.673 17.623 17.573 17.523 0 0.5 1 1.5 Load Current Io (A) VIN = 8 V VIN = 10 V VIN = 12 V VIN = 14 V
Note : Output current is limited in low input voltage configuration. Refer to " APPLICATION MANUAL" for Boost converter design.
34
DS04-27267-1E
MB39C313
(3) Negative Charge Pump Characteristic Output Voltage vs. Output Current VGL = -5 V
5 4.95 Output Voltage Vo ( V ) 4.9 4.85 4.8 4.75 4.7 4.65 4.6 4.55 4.5 0 0.02 0.04
2 1
Output Ripple Voltage VIN = 12V, VGL = -5V, ILOAD = 50 mA
VO3 100 mV/div
VIN = 8 V VIN = 10 V VIN = 12 V VIN = 14 V DRN 5 V/div
Load Current Io ( A )
Time base : 1 S/div
(4) Positive Charge Pump Characteristic Output Voltage vs. Output Current VSUP = 17.7 V, VGH = 32 V, ILOAD = 50 mA
32.56 Output Voltage Vo ( V ) 32.36 32.16 31.96 31.76 31.56 31.36 0 VIN = 8 V VIN = 10 V VIN = 12 V VIN = 14 V 0.02 0.04
2 1
Output Ripple Voltage VIN = 12 V, VSUP = 17.7 V, VGH = 32 V, ILOAD = 50 mA
VO3 100 mV/div
Load Current Io ( A )
DRN 5 V/div
Time base : 1 S/div
DS04-27267-1E
35
MB39C313
(5) Converter Load Transient Characteristic Buck Converter Load Transient Response VIN = 12 V, VLOGIC = 3.3 V, Co = 2 x 10 F, L1 = 10 H, FREQ = High
VO1 100 mV/div
1 1
Boost Converter Load Transient Response VIN = 12 V, VS = 17.7 V, Co = 3 x 22 F, L2 = 6.8 H, Ccomp = 22 nF, FREQ = High
VO2 200 mV/div
ILOAD = 200 mA to 1.2 A
2
IO1 ( 270 mA 500 mA/div
1.3 A ) Time base : 50
S/div
2
ILx2 1 A/div
Time base : 100
S/div
Negative Charge Pump Load Transient Response VIN = 12 V, VGL = -5 V, FREQ = High
VO3 100 mV/div
Positive Charge Pump Load Transient Response VIN = 12 V, VSUP = 17.7 V, VGH = 32 V, FREQ = High
VO4 500 mV/div
1
1
2
2
IO3(0 mA 50 mA/div
50 mA ) Time base : 50
S/div
IO4 ( 0 mA 50 mA/div
50 mA ) Time base : 100
S/div
36
DS04-27267-1E
MB39C313
(6) Converter Line Transient Characteristic Buck Converter Line Transient Response VLOGIC = 3.3 V, ILOAD = 1.5 A, Co = 2 x 10 F, L1 = 10 H, FREQ = High
VIN (10 V 14 V) 2 V/div(offset : 10 V)
1
Boost Converter Line Transient Response VS = 17.7 V, ILOAD = 1.5 A, Co = 3 x 22 F, L2 = 6.8 H, Ccomp = 22 nF, FREQ = High
VIN (10 V 14 V) 2 V/div(offset : 10 V)
1
VO1 100 mV/div
2 2
VO2 200 mV/div
4
IO1 (1.5 A) 1 A/div
4
Time base : 500 s/div
Negative Charge Pump Line Transient Response VGL = -5 V, ILOAD = 50 mA, FREQ = High
VIN (10 V 14 V) 2V/div (offset : 10 V)
1
Positive Charge Pump Line Transient Response VSUP = 17.7 V, VGH = 32 V ILOAD = 50 mA, FREQ = High
VIN (10 V 14 V) 2 V/div(offset : 10 V)
1
VO3 200 mV/div
2 2
VO4 200 mV/div
4
IO3 (50 mA) 50 mA/div
4
Time base : 500 s/div
IO4 (50 mA) 50 mA/div
Time base : 500 s/div
DS04-27267-1E
37
MB39C313
(7) Power-up Sequence Power-up Sequence VIN = EN1 = EN2 = 12 V All channel without load
VO1 2 V/div
1 1 2
Power-up Sequence EN2 Enabled Separately All channel without load
VO1 2 V/div
VO2 5 V/div
VO3 5 V/div
3
VO2 5 V/div
2
VO4 10 V/div
VO4 10 V/div
4
3 4
Time base : 2 ms/div
EN2 2 V/div
Time base : 1 ms/div
Power-up Sequence VIN = EN1 = EN2 = 12V ILoad(VLogic) = 1.5 A, ILoad(Vs) = 1.5 A ILoad(VGL) = 50 mA, ILoad(VGH) = 50 mA
Power-up Sequence EN2 Enabled Separately ILoad(VLogic) = 1.5 A, ILoad(Vs) = 1.5 A ILoad(VGL) = 50 mA, ILoad(VGH) = 50 mA
VO1 2 V/div
1 1 2
VO1 2 V/div
VO2 5 V/div
VO3 5 V/div
3
VO2 5 V/div
2
VO4 10 V/div
VO4 10 V/div
4
3 4
EN2 2 V/div Time base : 1 ms/div
Time base : 2 ms/div
38
DS04-27267-1E
MB39C313
TYPICAL APPLICATION CIRCUIT
VIN
R21 0R R22 0R C24 1 F 8 SUP SW 4 C17 22 pF J3 12 FREQ SW 5 R12 0R C18 0.47 F 21 VINB OS 3 R10 56 K R11 680 K R16 1M C19 220 nF R13 51K R14 0R Q1 Si2343DS R15 100 K C20 1 F C13 22 F L2 6.8 H D2 MBRA340T3 C14 22 F C15 22 F C16 22 F R8 0R
VO2(Vs)
17.7 V / 1.5 A
C21 22 F
20 VINB C7 22 F C8 22 F
FB
1
22 AVIN C1 1 F R28 100 K 16 EN1 J1 R29 100 K
GD 27 D5 BAT54S GND 23 R23 R24 0R C27 0.47 F C28
VO3(VGL)
-5 V/50 mA D3 BAT54S R17 0R
9
EN2
N.C. 19 C25 0.47 F
C29 J4
J2 11 DRN C22 0.47 F 13 FBN FBP 14 DRP 10 D4 BAT54S
VO4(VGH)
32 V / 50 mA C26 0.47 F
C23 0.47 F
R27 51 K C9 0.1 F
R26 1M
R25 300 K
R19 R20 620 K 150 K
C6 220 nF
24 REF
BOOT 17 L1 10 H D1 MBRA340T3 C12 10 nF R5 2K
VO1(Vlogic)
3.3 V/1.5 A
6
PGND
SWB 18 C10 10 F C11 10 F
PGND
7 PGND FBB 15
28 SS
COMP
2 R6 1.1 K R7 62R
25 DLY1 C3 22 nF C5 10 nF
DLY2 26 C4 10 nF
C2 22 nF R2 0R
: No Mount
MB39C313 (TSSOP28)
DS04-27267-1E
39
MB39C313
* Part List Count Designator 1 2 2 U1 C1, C24 C10, C11
Item Specification IC, Bias Power Supply for LCD Capacitor, Ceramic, 50 V, X5R, 10% Capacitor, Ceramic, 10 V, B, 20%
Part Value
Package
Part number MB39C313 C3216X5R1H105K C2012JB1A106K
Vendor FML TDK TDK
MB39C313 TSSOP28P 1 F 10 F 22 F 22 pF 1206 0805
6
C7, C8, C13, Capacitor, Ceramic, 25V, B, C14, C15, 20% C16 C17 C18, C22, C23, C25, C26, C27, C28, C29 C2, C3 C4, C5, C12 C6 C9 D1, D2 D3, D4, D5 L1 L2 R2, R12, R14, R17, R21, R23 R8 R10 R11 R13, R27 R19 R20 R26 R28, R29 R5 R6 Capacitor, Ceramic, 50 V, CH, 5% Capacitor, Ceramic, 50 V, B, 10% Capacitor, Ceramic, 50 V, B, 10% Capacitor, Ceramic, 50 V, B, 10% Capacitor, Ceramic, 25 V, B, 10% Capacitor, Ceramic, 50 V, B, 10% Diode, Schottky Rectifier, 3 A, 30 V Diode, Dual Schottky, 200 mA, 30 V Inductor, SMT, 6.5 A, 35 m Inductor, SMT, 4.4 A, 40 m Resistor, 1 A, Chip, 0.5% Resistor, 2 A, Chip, 0.5% Resistor, Chip, 1/16 W, 0.5% Resistor, Chip, 1/10 W, 0.5% Resistor, Chip, 1/16 W, 0.5% Resistor, Chip, 1/10 W, 0.5% Resistor, Chip, 1/16 W, 0.5% Resistor, Chip, 1/10 W, 0.5% Resistor, Chip, 1/16 W, 0.5% Resistor, Chip, 1/16W, 0.5% Resistor, Chip, 1/16W, 0.5%
1210
C3225JB1E226M
TDK
1
0603
C1608CH1H220J
TDK
8
0.47 F
1206
C3216JB1H474K
TDK
2 3 1 1 2 3 1 1 6 1 1 1 2 1 1 1 2 1 1
22 nF 10 nF 220 nF 0.1 F
0603 0603 0603 0603
C1608JB1H223K C1608JB1H103K C1608JB1E224K C1608JB1H104K MBRA340T3 BAT54S
TDK TDK TDK TDK OnSemi OnSemi NEC KOA KOA SSM KOA SSM KOA SSM KOA SSM SSM SSM
MBRA340T3 SMA-403D
BAT54S 10 H 6.8 H 0R 0R 56 K 680 K 51 K 620 K 150 K 1M 100 K 2K 1.1 K
SOT23 10x10.2 7.5x8 0603 0805 0603 0603 0603 0603 0603 0603 0603 0603 0603
CDRH104R-100NC Sumida PLC-0745-6R8S RK73Z1J RK73Z2J RR0816P-563-D RK73G1JTTD6803D RR0816P-513-D RK73G1JTTD6203D RR0816P-154-D RK73G1JTTD1004D RR0816P-104-D RR0816P-202-D RR0816P-112-D
(Continued)
40
DS04-27267-1E
MB39C313
(Continued) Count Designator 1 2 2 No Mount No Mount No Mount No Mount No Mount No Mount No Mount No Mount FML TDK OnSemi Sumida NEC KOA SSM Vishay R7 J1, J2 J3, J4 C19 C20 C21 Q1 R15 R16 R22 R24
Item Specification Resistor, Chip, 1/16W, 0.5% Jumper Jumper P-ch MOSFET
Part Value 62R 220 nF 1 F 22 F/25 V SI2343DS 100 K 1M 0R 0R
Package 0603 HDR1X2 HDR1X3 0603 1206 1210 SOT23 0603 0603 0603 0603
Part number RR0816Q-620-D Si2343DS
Vendor SSM Vishay
: FUJITSU MICROELECTRONICS LIMITED : TDK Corporation : ON Semiconductor Corporation : Sumida Corporation : NEC Electronics Corporation : KOA Corporation : SUSUMU Co. Ltd. : Vishay Intertechnology, Inc.
DS04-27267-1E
41
MB39C313
LAND PATTERN
The MB39C313 has an exposed thermal pad zone on the bottom side of the IC. This area has to be soldered onto the PCB board to enhance heat dissipation. The via should be placed in the thermal pad. These via assist heat dissipation towards the bottom layer of the PCB. Via and copper pad size may be adjusted according to PCB constraints. * Land pattern design example
9.7 mm 6.46 mm 0.65 mm
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Via Diameter = 0.3 mm
2.35 mm
3.4 mm
1.3 mm
Soldemask Opening
1.6 mm
1
2
3
4
5
6
7
8
9
10
11
12
13
14
0.35 mm 1.3 mm
42
5.6 mm
DS04-27267-1E
MB39C313
USAGE PRECAUTIONS
1. Never use setting exceeding maximum rated conditions.
Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
2. Use the devices within recommended conditions
It is recommended that devices be operated within recommended conditions. Exceeding the recommended operating condition may adversely affect devices reliability. Nominal electrical characteristics are warranted within the range of recommended operating conditions otherwise specified on each parameter in the section of electrical characteristics.
3. Design the ground line on printed circuit boards with consideration of common impedance. 4. Take appropriate static electricity measures.
Containers for semiconductor materials should have anti-static protection or be made of conductive material. After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. Work platforms, tools, and instruments should be properly grounded. Working personnel should be grounded with resistance of 250 k to 1 M between body and ground.
5. Do not apply negative voltages
The use of negative voltages below -0.3 V may activate parasitic transistors on the device, which can cause abnormal operation.
ORDERING INFORMATION
Part number MB39C313PFTH Package 28-pin plastic TSSOP FPT-28P-M20 Remarks Exposed PAD
EV BOARD ORDERING INFORMATION
EV Board Part No. MB39C313EVB-01 EV Board version No. MB39C313EVB-01 Rev.1.2 Remarks TSSOP-28
RoHS COMPLIANCE INFORMATION OF LEAD (Pb) FREE VERSION
The LSI products of FUJITSU MICROELECTRONICS with "E1" are compliant with RoHS Directive, and has observed the standard of lead, cadmium, mercury, hexavalent chromium, polybrominated biphenyls (PBB), and polybrominated diphenylethers (PBDE). A product whose part number has trailing characters "E1" is RoHS compliant.
DS04-27267-1E
43
MB39C313
MARKING FORMAT (LEAD FREE VERSION)
MB39C313 XXXX XXX E1
INDEX Lead-free version
44
DS04-27267-1E
MB39C313
LABELING SAMPLE (LEAD FREE VERSION)
Lead-free mark JEITA logo JEDEC logo
MB123456P - 789 - GE1
(3N) 1MB123456P-789-GE1 1000
G
Pb
(3N)2 1561190005 107210
QC PASS
PCS 1,000 MB123456P - 789 - GE1
2006/03/01
ASSEMBLED IN JAPAN
1/1
MB123456P - 789 - GE1
0605 - Z01A 1000
1561190005
The part number of a lead-free product has the trailing characters "E1".
"ASSEMBLED IN CHINA" is printed on the label of a product assembled in China.
DS04-27267-1E
45
MB39C313
PACKAGE DIMENSIONS
28-pin plastic TSSOP Lead pitch Package width x package length Lead shape Sealing method Mounting height Weight 0.65 mm 4.40 mm x 9.70 mm Gullwing Plastic mold 1.20 mm Max 0.12 g
(FPT-28P-M20)
28-pin plastic TSSOP (FPT-28P-M20)
*9.700.10(.382.004) 6.20(.244)
28 15
Note 1) Pins width and pins thickness include plating thickness. Note 2) Pins width do not include tie bar cutting remainder. Note 3) * : These dimensions do not include resin protrusion.
EXPOSED THERMAL PAD ZONE 0.1550.025 (.0061.0010)
INDEX
2.75 (.108)
6.400.20 (.252.008)
*4.400.10 (.173.004) Details of "A" part
1.10 -0.15 (Mounting height) +0.04 .043 -0.06
1 14
+0.10
0.65(.026)
"A" 0.240.08 (.009.003) 0.13(.005)
M
0~8
0.100.05 (.004.002) (Stand off) 0.10(.004) 0.600.15 (.024.006)
C
2007-2009 FUJITSU MICROELECTRONICS LIMITED F28063S-c-1-4
Dimensions in mm (inches). Note: The values in parentheses are reference values.
Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/
DS04-27267-1E
47
MB39C313
CONTENTS
page DESCRIPTION .................................................................................................................................................... 1 FEATURES .......................................................................................................................................................... 1 APPLICATIONS .................................................................................................................................................. 1 PIN ASSIGNMENT ............................................................................................................................................. 2 PIN DESCRIPTIONS .......................................................................................................................................... 3 I/O PIN EQUIVALENT CIRCUIT DIAGRAM ................................................................................................... 4 BLOCK DIAGRAM .............................................................................................................................................. 7 FUNCTIONAL DESCRIPTIONS ....................................................................................................................... 8 ABSOLUTE MAXIMUM RATINGS ................................................................................................................... 11 RECOMMENDED OPERATION CONDITIONS ............................................................................................ 12 ELECTRICAL CHARACTERISTICS ................................................................................................................ 13 TYPICAL CHARACTERISTICS ........................................................................................................................ 17 SET UP ................................................................................................................................................................. 19 APPLCATION MANUAL .................................................................................................................................... 22 EXAMPLE OF STANDARD OPERATION CHARACTERISTICS ............................................................... 33 TYPICAL APPLICATION CIRCUIT .................................................................................................................. 39 LAND PATTERN ................................................................................................................................................. 42 USAGE PRECAUTIONS ................................................................................................................................... 43 ORDERING INFORMATION ............................................................................................................................. 43 EV BOARD ORDERING INFORMATION ....................................................................................................... 43 RoHS COMPLIANCE INFORMATION OF LEAD (Pb) FREE VERSION .................................................. 43 MARKING FORMAT (LEAD FREE VERSION) .............................................................................................. 44 LABELING SAMPLE (LEAD FREE VERSION) ............................................................................................. 45 MB39C313PFTH RECOMMENDED CONDITIONS OF MOISTURE SENSITIVITY LEVEL ................. 46 PACKAGE DIMENSIONS .................................................................................................................................. 47
48
DS04-27267-1E
MB39C313
MEMO
DS04-27267-1E
49
MB39C313
MEMO
50
DS04-27267-1E
MB39C313
MEMO
DS04-27267-1E
51
MB39C313
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3329 http://jp.fujitsu.com/fml/en/ For further information please contact: North and South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ Korea FUJITSU MICROELECTRONICS KOREA LTD. 206 Kosmo Tower Building, 1002 Daechi-Dong, Gangnam-Gu, Seoul 135-280, Republic of Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LTD. 151 Lorong Chuan, #05-08 New Tech Park 556741 Singapore Tel : +65-6281-0770 Fax : +65-6281-0220 http://www.fmal.fujitsu.com/ FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. Rm. 3102, Bund Center, No.222 Yan An Road (E), Shanghai 200002, China Tel : +86-21-6146-3688 Fax : +86-21-6335-1605 http://cn.fujitsu.com/fmc/ FUJITSU MICROELECTRONICS PACIFIC ASIA LTD. 10/F., World Commerce Centre, 11 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel : +852-2377-0226 Fax : +852-2376-3269 http://cn.fujitsu.com/fmc/en/
Specifications are subject to change without notice. For further information please contact each office. All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of overcurrent levels and other abnormal operating conditions. Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws. The company names and brand names herein are the trademarks or registered trademarks of their respective owners. Edited: Sales Promotion Department

▲Up To Search▲

Price & Availability of MB39C313EVB-01

	To Download MB39C313EVB-01 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .